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1-6 Vol. 2A
ABOUT THIS MANUAL
1.3.3 Instruction Operands
When instructions are represented symbolically, a subset of the IA-32 assembly
language is used. In this subset, an instruction has the following format:
label: mnemonic argument1, argument2, argument3
where:
• A label is an identifier which is followed by a colon.
• A mnemonic is a reserved name for a class of instruction opcodes which have
the same function.
• The operands argument1, argument2, and argument3 are optional. There may
be from zero to three operands, depending on the opcode. When present, they
take the form of either literals or identifiers for data items. Operand identifiers
are either reserved names of registers or are assumed to be assigned to data
items declared in another part of the program (which may not be shown in the
example).
When two operands are present in an arithmetic or logical instruction, the right
operand is the source and the left operand is the destination.
For example:
LOADREG: MOV EAX, SUBTOTAL
In this example, LOADREG is a label, MOV is the mnemonic identifier of an opcode,
EAX is the destination operand, and SUBTOTAL is the source operand. Some
assembly languages put the source and destination in reverse order.
1.3.4 Hexadecimal and Binary Numbers
Base 16 (hexadecimal) numbers are represented by a string of hexadecimal digits
followed by the character H (for example, F82EH). A hexadecimal digit is a character
from the following set: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, and F.
Base 2 (binary) numbers are represented by a string of 1s and 0s, sometimes
followed by the character B (for example, 1010B). The “B” designation is only used in
situations where confusion as to the type of number might arise.
1.3.5 Segmented Addressing
The processor uses byte addressing. This means memory is organized and accessed
as a sequence of bytes. Whether one or more bytes are being accessed, a byte
address is used to locate the byte or bytes in memory. The range of memory that can
be addressed is called an address space.
The processor also supports segmented addressing. This is a form of addressing
where a program may have many independent address spaces, called segments.