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3-202 Vol. 2A CVTPD2PS—Convert Packed Double-Precision Floating-Point Values to Packed Single-
Precision Floating-Point Values
INSTRUCTION SET REFERENCE, A-M
#SS(0) For an illegal address in the SS segment.
#PF(fault-code) For a page fault.
#NM If CR0.TS[bit 3] = 1.
#XM If an unmasked SIMD floating-point exception and CR4.OSXM-
MEXCPT[bit 10] = 1.
#UD If an unmasked SIMD floating-point exception and CR4.OSXM-
MEXCPT[bit 10] = 0.
If CR0.EM[bit 2] = 1.
If CR4.OSFXSR[bit 9] = 0.
If CPUID.01H:EDX.SSE2[bit 26] = 0.
If the LOCK prefix is used.
Real-Address Mode Exceptions
#GP(0) If a memory operand is not aligned on a 16-byte boundary,
regardless of segment.
If any part of the operand lies outside the effective address
space from 0 to FFFFH.
#NM If CR0.TS[bit 3] = 1.
#XM If an unmasked SIMD floating-point exception and CR4.OSXM-
MEXCPT[bit 10] = 1.
#UD If an unmasked SIMD floating-point exception and CR4.OSXM-
MEXCPT[bit 10] = 0.
If CR0.EM[bit 2] = 1.
If CR4.OSFXSR[bit 9] = 0.
If CPUID.01H:EDX.SSE2[bit 26] = 0.
If the LOCK prefix is used.
Virtual-8086 Mode Exceptions
Same exceptions as in real address mode.
#PF(fault-code) For a page fault.
Compatibility Mode Exceptions
Same exceptions as in protected mode.