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Vol. 2A 3-593
INSTRUCTION SET REFERENCE, A-M
MINSS—Return Minimum Scalar Single-Precision Floating-Point Value
MINSS—Return Minimum Scalar Single-Precision Floating-Point Value
Description
Compares the low single-precision floating-point values in the destination operand
(first operand) and the source operand (second operand), and returns the minimum
value to the low doubleword of the destination operand. The source operand can be
an XMM register or a 32-bit memory location. The destination operand is an XMM
register. When the source operand is a memory operand, only 32 bits are accessed.
The three high-order doublewords of the destination operand remain unchanged.
If the values being compared are both 0.0s (of either sign), the value in the second
operand (source operand) is returned. If a value in the second operand is an SNaN,
that SNaN is returned unchanged to the destination (that is, a QNaN version of the
SNaN is not returned).
If only one value is a NaN (SNaN or QNaN) for this instruction, the second operand
(source operand), either a NaN or a valid floating-point value, is written to the result.
If instead of this behavior, it is required that the NaN source operand (from either the
first or second operand) be returned, the action of MINSD can be emulated using a
sequence of instructions, such as, a comparison followed by AND, ANDN and OR.
In 64-bit mode, use of the REX.R prefix permits this instruction to access additional
registers (XMM8-XMM15).
Operation
DEST[63:0] ← IF ((DEST[31:0] = 0.0) AND (SRC[31:0] = 0.0))
THEN SRC[31:0];
ELSE IF (DEST[31:0]
= SNaN) THEN SRC[31:0]; FI;
ELSE IF (SRC[31:0]
= SNaN) THEN SRC[31:0]; FI;
ELSE IF (DEST[31:0]
< SRC[31:0])
THEN DEST[31:0]
ELSE SRC[31:0]; FI; FI;
(* DEST[127:32] is unchanged *);
Intel C/C++ Compiler Intrinsic Equivalent
MINSS __m128d _mm_min_ss(__m128d a, __m128d b)
Opcode Instruction 64-Bit
Mode
Compat/
Leg Mode
Description
F3 0F 5D /r MINSS xmm1,
xmm2/m32
Valid Valid Return the minimum scalar single-
precision floating-point value
between xmm2/mem32 and
xmm1.