Intel 253666-024US Computer Hardware User Manual


 
3-348 Vol. 2A FLDENV—Load x87 FPU Environment
INSTRUCTION SET REFERENCE, A-M
FLDENV—Load x87 FPU Environment
Description
Loads the complete x87 FPU operating environment from memory into the FPU regis-
ters. The source operand specifies the first byte of the operating-environment data in
memory. This data is typically written to the specified memory location by a FSTENV
or FNSTENV instruction.
The FPU operating environment consists of the FPU control word, status word, tag
word, instruction pointer, data pointer, and last opcode. Figures 8-9 through 8-12 in
the Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 1, show
the layout in memory of the loaded environment, depending on the operating mode
of the processor (protected or real) and the current operand-size attribute (16-bit or
32-bit). In virtual-8086 mode, the real mode layouts are used.
The FLDENV instruction should be executed in the same operating mode as the corre-
sponding FSTENV/FNSTENV instruction.
If one or more unmasked exception flags are set in the new FPU status word, a
floating-point exception will be generated upon execution of the next floating-point
instruction (except for the no-wait floating-point instructions, see the section titled
“Software Exception Handling” in Chapter 8 of the Intel® 64 and IA-32 Architectures
Software Developer’s Manual, Volume 1). To avoid generating exceptions when
loading a new environment, clear all the exception flags in the FPU status word that
is being loaded.
If a page or limit fault occurs during the execution of this instruction, the state of the
x87 FPU registers as seen by the fault handler may be different than the state being
loaded from memory. In such situations, the fault handler should ignore the status of
the x87 FPU registers, handle the fault, and return. The FLDENV instruction will then
complete the loading of the x87 FPU registers with no resulting context inconsis-
tency.
This instruction’s operation is the same in non-64-bit modes and 64-bit mode.
Operation
FPUControlWord SRC[FPUControlWord];
FPUStatusWord SRC[FPUStatusWord];
FPUTagWord SRC[FPUTagWord];
FPUDataPointer SRC[FPUDataPointer];
FPUInstructionPointer SRC[FPUInstructionPointer];
FPULastInstructionOpcode SRC[FPULastInstructionOpcode];
Opcode Instruction 64-Bit
Mode
Compat/
Leg Mode
Description
D9 /4 FLDENV m14/28byte Valid Valid Load FPU environment from
m14byte or m28byte.