A SERVICE OF

logo

2-10 Vol. 2A
INSTRUCTION FORMAT
2.2.1.1 Encoding
Intel 64 and IA-32 instruction formats specify up to three registers by using 3-bit
fields in the encoding, depending on the format:
ModR/M: the reg and r/m fields of the ModR/M byte
ModR/M with SIB: the reg field of the ModR/M byte, the base and index fields of
the SIB (scale, index, base) byte
Instructions without ModR/M: the reg field of the opcode
In 64-bit mode, these formats do not change. Bits needed to define fields in the
64-bit context are provided by the addition of REX prefixes.
2.2.1.2 More on REX Prefix Fields
REX prefixes are a set of 16 opcodes that span one row of the opcode map and
occupy entries 40H to 4FH. These opcodes represent valid instructions (INC or DEC)
in IA-32 operating modes and in compatibility mode. In 64-bit mode, the same
opcodes represent the instruction prefix REX and are not treated as individual
instructions.
The single-byte-opcode form of INC/DEC instruction not available in 64-bit mode.
INC/DEC functionality is still available using ModR/M forms of the same instructions
(opcodes FF/0 and FF/1).
See Table 2-4 for a summary of the REX prefix format. Figure 2-4 though Figure 2-7
show examples of REX prefix fields in use. Some combinations of REX prefix fields are
invalid. In such cases, the prefix is ignored. Some additional information follows:
Setting REX.W can be used to determine the operand size but does not solely
determine operand width. Like the 66H size prefix, 64-bit operand size override
has no effect on byte-specific operations.
For non-byte operations: if a 66H prefix is used with prefix (REX.W = 1), 66H is
ignored.
If a 66H override is used with REX and REX.W = 0, the operand size is 16 bits.
REX.R modifies the ModR/M reg field when that field encodes a GPR, SSE, control
or debug register. REX.R is ignored when ModR/M specifies other registers or
defines an extended opcode.
REX.X bit modifies the SIB index field.
REX.B either modifies the base in the ModR/M r/m field or SIB base field; or it
modifies the opcode reg field used for accessing GPRs.