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3-186 Vol. 2A CPUID—CPU Identification
INSTRUCTION SET REFERENCE, A-M
IA-32 Architecture Compatibility
CPUID is not supported in early models of the Intel486 processor or in any IA-32
processor earlier than the Intel486 processor.
Operation
IA32_BIOS_SIGN_ID MSR ← Update with installed microcode revision number;
CASE (EAX) OF
EAX = 0:
EAX
← Highest basic function input value understood by CPUID;
EBX
← Vendor identification string;
EDX
← Vendor identification string;
ECX
← Vendor identification string;
BREAK;
EAX = 1H:
EAX[3:0]
← Stepping ID;
EAX[7:4]
← Model;
EAX[11:8]
← Family;
EAX[13:12]
← Processor type;
EAX[15:14]
← Reserved;
EAX[19:16]
← Extended Model;
EAX[23:20]
← Extended Family;
EAX[31:24] ← Reserved;
EBX[7:0]
← Brand Index; (* Reserved if the value is zero. *)
EBX[15:8]
← CLFLUSH Line Size;
EBX[16:23]
← Reserved; (* Number of threads enabled = 2 if MT enable fuse set. *)
EBX[24:31]
← Initial APIC ID;
ECX
← Feature flags; (* See Figure 3-6. *)
EDX ← Feature flags; (* See Figure 3-7. *)
BREAK;
EAX = 2H:
EAX
← Cache and TLB information;
EBX
← Cache and TLB information;
ECX
← Cache and TLB information;
EDX
← Cache and TLB information;
BREAK;
EAX = 3H:
EAX
← Reserved;
EBX
← Reserved;
ECX
← ProcessorSerialNumber[31:0];
(* Pentium III processors only, otherwise reserved. *)
EDX ← ProcessorSerialNumber[63:32];
(* Pentium III processors only, otherwise reserved. *