Filter
Top Products
Rev. 1.00, 05/04, page xiii of xxxiv
7.12.5 Pin Functions.......................................................................................................135
7.12.6 Input Pull-Up MOS in Ports C and D..................................................................135
7.13 Ports E, F...........................................................................................................................136
7.13.1 Port E and Port F Data Direction Registers (PEDDR, PFDDR)..........................136
7.13.2 Port E and Port F Output Data Registers (PEODR, PFODR)..............................137
7.13.3 Port E and Port F Input Data Registers (PEPIN, PFPIN).....................................138
7.13.4 Pin Functions.......................................................................................................138
7.13.5 Port E and Port F Nch-OD Control Register (PENOCR, PFNOCR)...................140
7.13.6 Pin Functions.......................................................................................................141
7.13.7 Input Pull-Up MOS in Ports E and F...................................................................141
7.14 Port G................................................................................................................................142
7.14.1 Port G Data Direction Register (PGDDR)...........................................................142
7.14.2 Port G Output Data Register (PGODR)...............................................................143
7.14.3 Port G Input Data Register (PGPIN)....................................................................143
7.14.4 Pin Functions.......................................................................................................144
7.14.5 Port G Nch-OD Control Register (PGNOCR).....................................................145
7.14.6 Pin Functions.......................................................................................................145
Section 8 8-Bit PWM Timer (PWM).................................................................147
8.1 Features.............................................................................................................................147
8.2 Input/Output Pins..............................................................................................................148
8.3 Register Descriptions........................................................................................................148
8.3.1 PWM Register Select (PWSL).............................................................................149
8.3.2 PWM Data Registers 7 to 0 (PWDR7 to PWD0).................................................151
8.3.3 PWM Data Polarity Register A (PWDPRA) .......................................................151
8.3.4 PWM Output Enable Register A (PWOERA).....................................................152
8.3.5 Peripheral Clock Select Register (PCSR)............................................................152
8.4 Operation ..........................................................................................................................153
8.4.1 PWM Setting Example ........................................................................................155
8.4.2 Diagram of PWM Used as D/A Converter ..........................................................155
8.5 Usage Notes......................................................................................................................156
8.5.1 Module Stop Mode Setting..................................................................................156
Section 9 16-Bit Free-Running Timer (FRT) ....................................................157
9.1 Features.............................................................................................................................157
9.2 Input/Output Pins..............................................................................................................159
9.3 Register Descriptions........................................................................................................159
9.3.1 Free-Running Counter (FRC)..............................................................................160
9.3.2 Output Compare Registers A and B (OCRA, OCRB).........................................160
9.3.3 Input Capture Registers A to D (ICRA to ICRD)................................................160
9.3.4 Output Compare Registers AR and AF (OCRAR, OCRAF)...............................161
9.3.5 Output Compare Register DM (OCRDM)...........................................................161
9.3.6 Timer Interrupt Enable Register (TIER)..............................................................162