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Rev. 1.00, 05/04, page 57 of 544
3.4 Address Map
Figures 3.1 and 3.2 show the address map in each operating mode.
Mode 2 (EXPE = 0)
Advanced mode
Single-chip mode
On-chip ROM
Internal I/O
registers 2
On-chip RAM
Internal I/O
registers 1
On-chip RAM
(128 bytes)
Internal I/O
registers 3
Reserved area
Reserved area
H'01FFFF
H'000000
H'FFE080
H'FFE880
H'FFFEFF
H'FFFFFF
H'FFFE50
H'FFFF7F
H'FFFF80
H'FFFF00
H'FFF800
H'FFFE4F
H'FFEFFF
H'00FFFF
Mode 3 (EXPE = 0)
Normal mode
Single-chip mode
H'DFFF
H'0000
On-chip ROM
Internal I/O
registers 2
On-chip RAM
Internal I/O
registers 1
H'EFFF
H'E080
H'E880
H'FEFF
H'FFFF
H'FE50
H'FF7F
H'FF80
H'FF00
On-chip RAM
(128 bytes)
Internal I/O
registers 3
H'F800
H'FE4F
Reserved area
Figure 3.1 Address Map for H8S/2111B-B