Renesas HD64F2111B Network Card User Manual


 
Rev. 1.00, 05/04, page 186 of 544
External clock
sources
Internal clock
sources
TMR_X
φ, φ/2, φ/4, φ/2048*, φ/4096*, φ/8192*
Clock X
Clock Y
Compare-match AX
Compare-match AY
Clear X
CMIAY
CMIBY
OVIY
ICIX
TMOY*
ExTMRIY*/TMRIY
TCORA_Y
Comparator A_Y
Comparator B_Y
TCORB_Y
TCSR_Y
TCR_Y
TCORA_X
Comparator A_X
TCNT_X
Comparator B_X
Comparator C
TCORB_X
TCORC
TICRR
TICRF
TICR
TCSR_X
TCR_X
ExTMCIY*/TMCIY
ExTMCIX*/TMCIX
TISR
TCNT_Y
Overflow X
Overflow Y
Compare- match BX
Compare-match BY
Compare-match C
Input capture
Clock
select
Internal bus
Control
logic
[Legend]
TCORA_X: Time constant register A_X
TCORB_X: Time constant register B_X
TCNT_X: Timer counter_X
TCSR_X: Timer control/status register_X
TCR_X: Timer control register_X
TICR: Input capture register
TCORC: Time constant register C
TICRR: Input capture register R
TICRF: Input capture register F
TCORA_Y: Time constant register A_Y
TCORB_Y: Time constant register B_Y
TCNT_Y: Timer counter_Y
TCSR_Y: Timer control/status register_Y
TCR_Y: Timer control register_Y
TISR: Timer input select register
Clear Y
TMR_Y
φ/4, φ/256, φ/2048, φ/4096*, φ/8192*, φ/16384*
Interrupt signals
+
ExTMOX*/TMOX
ExTMRIX*/TMRIX
*
*
Note: The program development tool (emulator) does not support this function.
Figure 10.2 Block Diagram of 8-Bit Timer (TMR_Y and TMR_X)