Renesas HD64F2111B Network Card User Manual


 
Rev. 1.00, 05/04, page 123 of 544
7.9.3 Pin Functions
P97/SDA0
The pin function is switched as shown below according to the combination of the ICE bit in
ICCR of IIC_0, the IIC0AS and the IIC0BS bits in PGCTL*, and the P97DDR bit.
P97ICE = ICE (IIC0AS+IIC0BS)*
P97ICE* 0 1
P97DDR 0 1
Pin Function P97 input pin P97 output pin SDA0 I/O pin
Note: When this pin is set as the P97 output pin, it is an NMOS push-pull output. SDA0 is an
NMOS open-drain output, and has direct bus drive capability.
* The program development tool (emulator) does not support the function of PGCTL.
Thus P97ICE is treated as ICE.
P96/φ/EXCL
The pin function is switched as shown below according to the combination of the EXCLE bit
in LPWRCR and the P96DDR bit.
P96DDR 0 1
EXCLE 0 1 0
Pin Function P96 input pin EXCL input pin φ output pin
Note: * When this pin is used as the EXCL input pin, P96DDR should be cleared to 0.
P95
The pin function is switched as shown below according to the state of the P95DDR bit.
P95DDR 0 1
Pin Function P95 input pin P95 output pin
P94
The pin function is switched as shown below according to the state of the P94DDR bit.
P94DDR 0 1
Pin Function P94 input pin P94 output pin
P93
The pin function is switched as shown below according to the state of the P93DDR bit.
P93DDR 0 1
Pin Function P93 input pin P93 output pin