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Rev. 1.00, 05/04, page xxxi of xxxiv
Tables
Section 1 Overview
Table 1.1
Pin Functions in Each Operating Mode....................................................................4
Table 1.2 Pin Functions ............................................................................................................9
Section 2 CPU
Table 2.1
Instruction Classification........................................................................................29
Table 2.2 Operation Notation .................................................................................................30
Table 2.3 Data Transfer Instructions.......................................................................................31
Table 2.4 Arithmetic Operations Instructions (1) ...................................................................32
Table 2.4 Arithmetic Operations Instructions (2) ...................................................................33
Table 2.5 Logic Operations Instructions.................................................................................34
Table 2.6 Shift Instructions.....................................................................................................34
Table 2.7 Bit Manipulation Instructions (1)............................................................................35
Table 2.7 Bit Manipulation Instructions (2)............................................................................36
Table 2.8 Branch Instructions.................................................................................................37
Table 2.9 System Control Instructions....................................................................................38
Table 2.10 Block Data Transfer Instructions............................................................................38
Table 2.11 Addressing Modes ..................................................................................................40
Table 2.12 Absolute Address Access Ranges...........................................................................41
Table 2.13 Effective Address Calculation (1)...........................................................................44
Table 2.13 Effective Address Calculation (2)...........................................................................45
Section 3 MCU Operating Modes
Table 3.1
MCU Operating Mode Selection ............................................................................51
Section 4 Exception Handling
Table 4.1
Exception Types and Priority..................................................................................59
Table 4.2 Exception Handling Vector Table...........................................................................60
Table 4.3 Status of CCR after Trap Instruction Exception Handling .....................................63
Section 5 Interrupt Controller
Table 5.1
Pin Configuration....................................................................................................68
Table 5.2 Correspondence between Interrupt Source and ICR...............................................70
Table 5.3 Interrupt Sources, Vector Addresses, and Interrupt Priorities.................................78
Table 5.4 Interrupt Control Modes .........................................................................................80
Table 5.5 Interrupt Response Times.......................................................................................86
Table 5.6 Number of States in Interrupt Handling Routine Execution Status ........................86
Section 7 I/O Ports
Table 7.1
Port Functions.........................................................................................................96
Table 7.2 Input Pull-Up MOS States (Port 1).......................................................................102
Table 7.3 Input Pull-Up MOS States (Port 2).......................................................................104