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Rev. 1.00, 05/04, page xv of xxxiv
10.5.1 TCNT Count Timing ...........................................................................................207
10.5.2 Timing of CMFA and CMFB Setting at Compare-Match...................................207
10.5.3 Timing of Timer Output at Compare-Match........................................................208
10.5.4 Timing of Counter Clear at Compare-Match.......................................................208
10.5.5 TCNT External Reset Timing..............................................................................209
10.5.6 Timing of Overflow Flag (OVF) Setting .............................................................209
10.6 TMR_0 and TMR_1 Cascaded Connection......................................................................210
10.6.1 16-Bit Count Mode..............................................................................................210
10.6.2 Compare-Match Count Mode ..............................................................................210
10.7 TMR_Y and TMR_X Cascaded Connection....................................................................211
10.7.1 16-Bit Count Mode..............................................................................................211
10.7.2 Compare-Match Count Mode ..............................................................................211
10.7.3 Input Capture Operation ......................................................................................212
10.8 TMR_B and TMR_A Cascaded Connection ....................................................................212
10.8.1 16-Bit Count Mode..............................................................................................212
10.8.2 Compare-Match Count Mode ..............................................................................212
10.8.3 Input Capture Operation ......................................................................................213
10.9 Interrupt Sources...............................................................................................................215
10.10 Usage Notes......................................................................................................................216
10.10.1 Conflict between TCNT Write and Counter Clear...............................................216
10.10.2 Conflict between TCNT Write and Count-Up.....................................................216
10.10.3 Conflict between TCOR Write and Compare-Match...........................................217
10.10.4 Conflict between Compare-Matches A and B .....................................................217
10.10.5 Switching of Internal Clocks and TCNT Operation.............................................218
10.10.6 Mode Setting with Cascaded Connection............................................................219
10.10.7 Module Stop Mode Setting..................................................................................219
Section 11 Watchdog Timer (WDT)..................................................................221
11.1 Features.............................................................................................................................221
11.2 Input/Output Pins..............................................................................................................223
11.3 Register Descriptions........................................................................................................223
11.3.1 Timer Counter (TCNT)........................................................................................223
11.3.2 Timer Control/Status Register (TCSR)................................................................224
11.4 Operation ..........................................................................................................................227
11.4.1 Watchdog Timer Mode........................................................................................227
11.4.2 Interval Timer Mode............................................................................................229
11.4.3 RESO Signal Output Timing ...............................................................................230
11.5 Interrupt Sources...............................................................................................................230
11.6 Usage Notes......................................................................................................................231
11.6.1 Notes on Register Access.....................................................................................231
11.6.2 Conflict between Timer Counter (TCNT) Write and Increment..........................232
11.6.3 Changing Values of CKS2 to CKS0 Bits.............................................................232
11.6.4 Switching between Watchdog Timer Mode and Interval Timer Mode................232