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Rev. 1.00, 05/04, page 410 of 544
Slave CPU Master CPU
ODR1 write
Write 1 to IRQ1E1
OBF1 = 0?
Yes
No
No
Yes
All bytes
transferred?
SERIRQ IRQ1 output
SERIRQ IRQ1
source clearance
Interrupt initiation
ODR1 read
Hardware operation
Software operation
Figure 15.8 HIRQ Flowchart (Example of Channel 1)