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Rev. 1.00, 05/04, page 441 of 544
18.6 Operating Modes
The flash memory is connected to the CPU via a 16-bit data bus, enabling byte data and word data
to be accessed in a single state. Even addresses are connected to the upper 8 bits and odd addresses
are connected to the lower 8 bits. Note that word data must start from an even address.
In normal mode (mode 3), up to 56 Kbytes of ROM can be used.
Table 18.3 Operating Modes and ROM
Operating Modes Mode Pins
MCU
Operating Mode
CPU
Operating Mode Mode MD1 MD0 On-Chip ROM
Mode 2 Advanced Single-chip mode 1 0 Enabled (64 Kbytes)
Mode 3 Normal Single-chip mode 1 1 Enabled (56 Kbytes)
18.7 On-Board Programming Modes
An on-board programming mode is used to perform on-chip flash memory programming, erasing,
and verification. This LSI has two on-board programming modes: boot mode and user program
mode. Table 18.4 shows pin settings for boot mode. In user program mode, operation by software
is enabled by setting control bits. For details on flash memory mode transitions, see figure 18.2.
Table 18.4 On-Board Programming Mode Settings
Mode Setting MD1 MD0 P92 P91 P90
Boot mode 0 0 1* 1* 1*
Mode 2 (advanced mode) 1 0 User program mode
Mode 3 (normal mode) 1 1
Note: * Can be used as an I/O port after the boot mode activation.