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Rev. 1.00, 05/04, page 437 of 544
18.4 Input/Output Pins
The flash memory is controlled by means of the pins shown in table 18.2.
Table 18.2 Pin Configuration
Pin Name I/O Function
RES Input Reset
MD1 Input Sets this LSI's operating mode
MD0 Input Sets this LSI's operating mode
P92 Input Sets this LSI's operating mode
P91 Input Sets this LSI's operating mode
P90 Input Sets this LSI's operating mode
TxD1 Output Serial transmit data output
RxD1 Input Serial receive data input
18.5 Register Descriptions
The flash memory has the following registers. To access FLMCR1, FLMCR2, EBR1, or EBR2,
the FLSHE bit in the serial/timer control register (STCR) should be set to 1. For details on the
serial/timer control register, refer to section 3.2.3, Serial Timer Control Register (STCR).
• Flash memory control register 1 (FLMCR1)
• Flash memory control register 2 (FLMCR2)
• Erase block register 1 (EBR1)
• Erase block register 2 (EBR2)