Filter
Top Products
Intel
®
IXP43X Product Line of Network Processors
April 2007 HDG
Document Number: 316844; Revision: 001US 25
Hardware Design Guidelines—Intel
®
IXP43X Product Line of Network Processors
Boot-strapping is required in certain address pins of the Expansion bus. If it is required
to change access mode, after the system has booted, and during normal operation; the
Timing and Control Register for Chip Select must be configured to perform the desired
mode access. For a complete description on accomplishing this refer to the Expansion
Bus chapter in the Intel
®
IXP43X Product Line of Network Processors Developer’s
Manual.
3.3.4 16-Bit Device Interface
The IXP43X network processors support 16-bit wide data bus devices (16-bit word
mode). For Intel interface cycles, the data lines and control signals can be connected as
shown in Figure 3 on page 26.
When booting a 16-bit flash device, the expansion bus must be configured during reset
to the 16-bit mode (see Configuration Register 0).
Bit 0 = 0. This can be done by placing an external 470 ohm pull-down resistor to the
pin EX_ADDR[0].
Bit 7 = 0. This can be done by placing an external 470 ohm pull-down resistor to the
pin EX_ADDR[7].
Boot-strapping is required in certain address pins of the Expansion bus.To change to
access mode after booting the system and during normal operation, the Timing and
Control Register for Chip Select must be configured to perform the desired mode
access. For a complete description on how to accomplish this refer to the Expansion
Bus chapter in the Intel
®
IXP43X Product Line of Network Processors Developer’s
Manual.