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Intel
®
IXP43X Product Line of Network Processors—Hardware Design Guidelines
Intel
®
IXP43X Product Line of Network Processors
HDG April 2007
26 Document Number: 316844; Revision: 001US
3.3.5 Flash Interface
Figure 4 illustrates how a boot ROM is connected to the expansion bus. The flash (ROM)
used in the block diagram is the Intel StrataFlash
®
memory device TE28F256J3D —
32-Mbyte, 16-bit, flash in the 56-TSOP package. The Intel StrataFlash memory
TE28F256J3D is part of the 0.18-µm, 3.3-V Intel StrataFlash memory.
.
Figure 3. 8/16-Bit Device Interface
EX_ADDR[23:0]
EX_DATA[7:0]
8-Bit Device
Byte Access
CS
OE
WR
EX_ADDR[23:0]
EX_DATA[15:0]
EX_CS_N
EX_RD_N
EX_WR_N
CS_N
OE_N
WR_N
DATA[7:0]
ADDR[23:0]
EX_ADDR[23:0]
EX_DATA[15:0]
16-Bit Device
16-Bit-Word Access
CS
OE
WR
EX_ADDR[23:0]
EX_DATA[15:0]
EX_CS_N
EX_RD_N
EX_WR_N
CS_N
OE_N
WR_N
DATA[15:0]
ADDR[23:0]
Intel® IXP43X Product
Line of Network
Processors
Intel® IXP43X Product
Line of Network
Processors
B4095-004