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Intel
®
IXP43X Product Line of Network Processors
April 2007 HDG
Document Number: 316844; Revision: 001US 33
Hardware Design Guidelines—Intel
®
IXP43X Product Line of Network Processors
3.6.1 Signal Interface
3.6.2 Design Notes
The drive strength for GPIO[15:14] is limited to 8 mA, while GPIO [13:0] can output up
to 16 mA. When used for driving high current devices such as LEDs or relays, make
sure to place current-limiting resistor; else there could be permanent damage to the
driver of the IXP43X network processors.
It is recommended that a 10-KΩ pull-up resistor be used when a GPIO port is
configured as an input and not being used.
3.7 USB Interface
There are two USBV2.0 Host Controllers in the IXP43X network processors. It supports
Low-Speed, 1.5 Mbps, Full-Speed, 12 Mbps, High-Speed, 480 Mbps rate and interface
is EHCI compliant.
Supported features are:
• Host function
•Low-speed interface
• Full-speed interface
• High-speed interface
• EHCI register interface
• UTMI+ Level 2 Compliant
The following is a partial list of features that are not supported:
• Device function
• OTG function
Table 12. GPIO Signal Recommendations
Name
Type
Field
Pull
Up/
Down
Recommendations
GPIO[13:0] IO Yes
General Purpose Input/Output.
If used as an input interrupt (only GPIO [12:0]), should be pull-up or pull-down, depending
on the level of activation. For example:
Active high, use a 10-KΩ pull-down resistor.
Active low, use a 10-KΩ pull-up resistor.
Should be pulled high through a 10-KΩ resistor when not used.
Note: Alternate function for GPIO[1] - External USB 48 MHz Bypass Clock
GPIO[14] IO Yes
General Purpose Input/Output.
Same recommendations as GPIO[13:0]. An additional feature includes Clock generation, max
clock out 33.33 MHz., set as input by default.
GPIO[15] IO Yes
General Purpose Input/Output.
Same recommendations as GPIO[13:0]. An additional feature includes Clock generation, max
clock out 33.33 MHz., set as output by default.