Intel
®
IXP43X Product Line of Network Processors—Hardware Design Guidelines
Intel
®
IXP43X Product Line of Network Processors
HDG April 2007
42 Document Number: 316844; Revision: 001US
3.9.1 Signal Interface
3.9.2 Device Connection
Figure 11 shows a typical interface between the IXP43X network processors and a SLIC
CODEC, through the SSP and HSS ports, and a couple of GPIO signals.
Table 15. High-Speed, Serial Interface 0
Name
Type
Field
Pull
Up
Down
Recommendations
HSS_TXFRAME0 I/O Yes
Transmit frame.
When this interface/signal is enabled and is not being used in a system design, the
interface/signal should be pulled high with a 10-KΩ resistor.
HSS_TXDATA0 OD Yes
Transmit data out. Open Drain Output.
When this interface/signal is enabled and is used or not used in a system design, the
interface/signal should be pulled high with a 10-KΩ resistor to Vcc33.
HSS_TXCLK0 I/O Yes
Transmit clock.
When this interface/signal is enabled and is not being used in a system design, the
interface/signal should be pulled high with a 10-KΩ resistor.
HSS_RXFRAME0 I/O Yes
Receive frame.
When this interface/signal is enabled and is not being used in a system design, the
interface/signal should be pulled high with a 10-KΩ resistor.
HSS_RXDATA0 I Yes
Receive data input.
When this interface/signal is enabled and is not being used in a system design, the
interface/signal should be pulled high with a 10-KΩ resistor.
HSS_RXCLK0 I/O Yes
Receive clock.
When this interface/signal is enabled and is not being used in a system design, the
interface/signal should be pulled high with a 10-KΩ resistor.
Notes:
1. Features disabled/enabled by Soft Fuse must be done during the boot-up sequence. A feature cannot be enabled after
being disabled without asserting a system reset.
2. Features disabled by a specific part number, do not require pull-ups or pull-downs. Therefore, all pins can be left
unconnected.
3. Features Enabled by a specific part number and required to be Soft Fuse-disabled, as stated in Note 1 alone require pull-
ups or pull-downs in the clock-input signals.