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S/UNI-QUAD
PMC-Sierra, Inc.
PM5349 S/UNI-QUAD
DATASHEET
PMC-971239 ISSUE 6 SATURN USER NETWORK INTERFACE (155-QUAD)
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
100
Register 0x30 (EXTD=0): RPOP Status/Control
Bit Type Function Default
Bit 7 R/W Reserved 0
Bit 6 R LOPCONV X
Bit 5 R LOPV X
Bit 4 R PAISONV X
Bit 3 R PAISV X
Bit 2 R PRDIV X
Bit 1 R NEWPTRI X
Bit 0 R/W NEWPTRE 0
NOTE: To facilitate additional register mapping, shadow registers have been
added to registers 0x30, 0x31 and 0x33. These shadow registers are accessed in
the same way as the normal registers.
The EXTD (extend register) bit must be set in register 0x36 to allow switching
between accessing the normal registers and the shadow registers.
This register allows the status of path level alarms to be monitored.
NEWPTRE:
The NEWPTRE bit is the interrupt enable for the receive new pointer status.
When NEWPTRE is a logic one, an interrupt is generated when the pointer
interpreter validates a new pointer.
NEWPTRI:
The NEWPTRI bit is the receive new pointer interrupt status bit. NEWPTRI is
a logic one when the pointer interpreter has validated a new pointer value
(H1, H2). NEWPTRI is cleared when this register is read.
PRDIV:
The PRDIV bit is read to determine the remote defect indication state. When
PRDIV is a logic one, the S/UNI-QUAD has declared path RDI.
PA I S V:
The PAISV bit is read to determine the path AIS state. When PAISV is a logic
one, the S/UNI-QUAD has declared path AIS.