PMC-Sierra PM5349 Network Router User Manual


 
S/UNI-QUAD
PMC-Sierra, Inc.
PM5349 S/UNI-QUAD
DATASHEET
PMC-971239 ISSUE 6 SATURN USER NETWORK INTERFACE (155-QUAD)
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
144
Register 0x68: RXCP Idle Cell Header Mask
Bit Type Function Default
Bit 7 R/W MGFC[3] 1
Bit 6 R/W MGFC[2] 1
Bit 5 R/W MGFC[1] 1
Bit 4 R/W MGFC[0] 1
Bit 3 R/W MPTI2] 1
Bit 2 R/W MPTI[1] 1
Bit 1 R/W MPTI[0] 1
Bit 0 R/W MCLP 1
MGFC[3:0]:
The MGFC[3:0] bits contain the mask pattern for the first, second, third, and
fourth bits of the first octet of the 53-octet cell. This mask is applied to the Idle
Cell Header Pattern Register to select the bits included in the cell filter. A
logic one in any bit position enables the corresponding bit in the pattern
register to be compared. A logic zero causes the masking of the
corresponding bit.
MPTI[3:0]:
The MPTI[3:0] bits contain the mask pattern for the fifth, sixth, and seventh
bits of the fourth octet of the 53-octet cell. This mask is applied to the Idle
Cell Header Pattern Register to select the bits included in the cell filter. A
logic one in any bit position enables the corresponding bit in the pattern
register to be compared. A logic zero causes the masking of the
corresponding bit.
MCLP:
The CLP bit contains the mask pattern for the eighth bit of the fourth octet of
the 53-octet cell. This mask is applied to the Idle Cell Header Pattern
Register to select the bits included in the cell filter. A logic one in this bit
position enables the MCLP bit in the pattern register to be compared. A logic
zero causes the masking of the MCLP bit.