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S/UNI-QUAD
PMC-Sierra, Inc.
PM5349 S/UNI-QUAD
DATASHEET
PMC-971239 ISSUE 6 SATURN USER NETWORK INTERFACE (155-QUAD)
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
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DESCRIPTION
The PM5349 S/UNI-QUAD SATURN User Network Interface is a monolithic
integrated circuit that implements four channel SONET/SDH processing and ATM
mapping functions at the STS-3c (STM-1) 155.52 Mbit/s rate.
The S/UNI-QUAD receives SONET/SDH streams using a bit serial interface,
recovers the clock and data and processes section, line, and path overhead. It
performs framing (A1, A2), de-scrambling, detects alarm conditions, and monitors
section, line, and path bit interleaved parity (B1, B2, B3), accumulating error
counts at each level for performance monitoring purposes. Line and path far end
block error indications (M1, G1) are also accumulated. The S/UNI-QUAD
interprets the received payload pointers (H1, H2) and extracts the synchronous
payload envelope which carries the received ATM cell payload.
The S/UNI-QUAD frames to the ATM payload using cell delineation. HCS error
correction is provided. Idle/unassigned cells may be dropped according to a
programmable filter. Cells are also dropped upon detection of an uncorrectable
header check sequence error. The ATM cell payloads are descrambled. The ATM
cells that are passed are written to a four cell FIFO buffer. The received cells are
read from the FIFO using a 16-bit wide Utopia level 2 compliant datapath
interface. Counts of received ATM cell headers that are errored and uncorrectable
and also those that are errored and correctable are accumulated independently
for performance monitoring purposes.
The S/UNI-QUAD transmits SONET/SDH streams using a bit serial interface and
formats section, line, and path overhead appropriately. It synthesizes the transmit
clock from a lower frequency reference and performs framing pattern insertion
(A1, A2), scrambling, alarm signal insertion, and creates section, line, and path
bit interleaved parity (B1, B2, B3) as required to allow performance monitoring at
the far end. Line and path far end block error indications (M1, G1) are also
inserted. The S/UNI-QUAD generates the payload pointer (H1, H2) and inserts
the synchronous payload envelope which carries the ATM cell payload. The
S/UNI-QUAD also supports the insertion of a large variety of errors into the
transmit stream, such as framing pattern errors, bit interleaved parity errors, and
illegal pointers, which are useful for system diagnostics and tester applications.
ATM cells are written to an internal four cell FIFO using a 16-bit wide Utopia Level
2 datapath interface. Idle/unassigned cells are automatically inserted when the
internal FIFO contains less than one cell. The S/UNI-QUAD provides generation
of the header check sequence and scrambles the payload of the ATM cells. Each
of these transmit ATM cell processing functions can be enabled or bypassed.