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S/UNI-QUAD
PMC-Sierra, Inc.
PM5349 S/UNI-QUAD
DATASHEET
PMC-971239 ISSUE 6 SATURN USER NETWORK INTERFACE (155-QUAD)
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
103
Register 0x31 (EXTD=0): RPOP Interrupt Status
Bit Type Function Default
Bit 7 R PSLI X
Bit 6 Unused X
Bit 5 R LOPI X
Bit 4 Unused X
Bit 3 R PAISI X
Bit 2 R PRDII X
Bit 1 R BIPEI X
Bit 0 R FEBEI X
NOTE: To facilitate additional register mapping, shadow registers have been
added to registers 0x30, 0x31 and 0x33. These shadow registers are accessed in
the same way as the normal registers.
The EXTD (extend register) bit must be set in register 0x36 to allow switching
between accessing the normal registers and the shadow registers.
This register allows identification and acknowledgment of path level alarm and
error event interrupts.
FEBEI:
The FEBEI bit is the path FEBE interrupt status bit. FEBEI is a logic one
when a FEBE error is detected. This bit is cleared when this register is read.
BIPEI:
The BIPEI bit is the path BIP-8 interrupt status bit. BIPEI is a logic one when
a B3 error is detected. This bit is cleared when this register is read.
PRDII:
The PRDII bit is the path remote defect indication interrupt status bit. PRDII is
a logic one when a change in the path RDI state or the auxiliary path RDI
state occurs. This bit is cleared when this register is read.
PAISI:
The PAISI bit is the path alarm indication signal interrupt status bit. PAISI is a
logic one when a change in the path AIS state occurs. This bit is cleared
when this register is read.