PMC-Sierra PM5349 Network Router User Manual


 
S/UNI-QUAD
PMC-Sierra, Inc.
PM5349 S/UNI-QUAD
DATASHEET
PMC-971239 ISSUE 6 SATURN USER NETWORK INTERFACE (155-QUAD)
Proprietary and Confidential to PMC-SIERRA, Inc., and for its Customers’ Internal Use
II
10.3 RECEIVE LINE OVERHEAD PROCESSOR (RLOP).........................................35
10.3.1 LINE RDI DETECT..........................................................................35
10.3.2 LINE AIS DETECT ..........................................................................35
10.3.3 ERROR MONITOR BLOCK ............................................................35
10.4 THE RECEIVE APS, SYNCHRONIZATION EXTRACTOR AND BIT ERROR
MONITOR (RASE)..............................................................................................36
10.4.1 AUTOMATIC PROTECTION SWITCH CONTROL..........................36
10.4.2 BIT ERROR RATE MONITOR.........................................................37
10.4.3 SYNCHRONIZATION STATUS EXTRACTION................................37
10.5 RECEIVE PATH OVERHEAD PROCESSOR (RPOP)........................................38
10.5.1 POINTER INTERPRETER..............................................................38
10.5.2 SPE TIMING....................................................................................42
10.5.3 ERROR MONITOR..........................................................................42
10.6 RECEIVE ATM CELL PROCESSOR (RXCP) ....................................................43
10.6.1 CELL DELINEATION.......................................................................43
10.6.2 DESCRAMBLER.............................................................................44
10.6.3 CELL FILTER AND HCS VERIFICATION .......................................44
10.6.4 PERFORMANCE MONITOR ..........................................................46
10.7 TRANSMIT LINE INTERFACE (CSPI) ...............................................................46
10.7.1 CLOCK SYNTHESIS ......................................................................46
10.7.2 PARALLEL TO SERIAL CONVERTER ...........................................47
10.8 TRANSMIT SECTION OVERHEAD PROCESSOR (TSOP)..............................47
10.8.1 LINE AIS INSERT ...........................................................................47
10.8.2 BIP-8 INSERT .................................................................................47
10.8.3 FRAMING AND IDENTITY INSERT ...............................................48
10.8.4 SCRAMBLER..................................................................................48
10.9 TRANSMIT LINE OVERHEAD PROCESSOR (TLOP) ......................................48
10.9.1 APS INSERT...................................................................................48
10.9.2 LINE BIP CALCULATE....................................................................48
10.9.3 LINE RDI INSERT...........................................................................48
10.9.4 LINE FEBE INSERT........................................................................49
10.10 TRANSMIT PATH OVERHEAD PROCESSOR (TPOP) .....................................49