VXI 320222-01 Network Card User Manual


 
General Information Chapter 1
VXI-MXI User Manual 1-4 © National Instruments Corporation
Overview
The VXI-MXI is an extended class Register-Based VXIbus device with optional Slot 0 capability
so that it can reside in any slot in a C-size or D-size VXIbus chassis. The VXI-MXI converts
A32, A24, A16, D32, D16, and D08(EO) VXIbus bus cycles into MXIbus bus cycles and vice
versa. The VXI-MXI has four address windows that map into and out of the VXIbus mainframe.
These four windows represent the three VMEbus address spaces (A32, A24, and A16) plus a
dedicated window for mapping the VXIbus configuration space (the upper 16 kilobytes of A16
space).
The MXIbus is a multidrop system bus that connects multiple devices at the hardware bus level
in a software-transparent manner. Multiple VXIbus mainframes with VXI-MXI interfaces can
be connected to form a single multiframe VXIbus system. An external PC with a MXIbus
interface can also be connected to a VXIbus mainframe with a VXI-MXI. This configuration
makes the PC appear to be embedded on a VXIbus module that is plugged into the VXIbus
mainframe.
Multiple MXIbus devices are tightly coupled by mapping together portions of each device's
address space and locking the internal hardware bus cycles to the MXIbus. The window address
circuitry on each MXIbus device monitors internal local bus cycles to detect bus cycles that map
across the MXIbus. Similarly, external MXIbus cycles are monitored to detect MXIbus cycles
that map into the VXIbus system. MXIbus devices can operate in parallel at full speed over their
local system bus and need to synchronize operation with another device only when addressing or
being addressed by a resource located on another MXIbus device. The MXIbus device
originating the transaction must gain ownership of both the MXIbus and the local bus in the
target MXIbus device. All hardware bus cycles are then coupled across the MXIbus and local
buses before the transfer completes.
The VXI-MXI has the following features:
Interfaces the VXIbus to the MXIbus (32-bit Multisystem eXtension Interface bus)
Extends VXIbus to multiple mainframes, external MXIbus-equipped instruments, and
external MXIbus-equipped personal computers (PCs)
Allows multiple VXIbus mainframes to appear as a single VXIbus system
Provides integrated block mode for high-performance data transfers
Supports dynamic configuration of VXIbus devices
Provides optional interlocked bus operation for prevention of deadlock conditions
Includes daughter card connector scheme giving additional functionality for optional
daughter cards
Is fully compatible with VXIbus and MXIbus specifications
Has no restrictions on Commander/Servant hierarchy or physical location of devices
The VXI-MXI generates all the support signals required by the VMEbus:
VMEbus System Controller functions:
16 MHz system clock driver
VME bus timeout (BTO)