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Register Descriptions Chapter 4
VXI-MXI User Manual 4-20 © National Instruments Corporation
The A24 Window Map Register has the following format when the CMODE bit is set:
R/W
7 65432
1
A24LOW7 A24LOW6 A24LOW5 A24LOW4 A24LOW3 A24LOW2
A24LOW1
A24LOW0
0
15 14 13 12 11 10 9 8
R/W
A24HIGH7 A24HIGH6 A24HIGH5 A24HIGH4 A24HIGH3 A24HIGH2
A24HIGH1
A24HIGH0
Bit Mnemonic Description
15-8r/w A24HIGH[7-0] A24 Window Upper Bound
These bits define the upper limit of the range of MXIbus A24
addresses that map into the VXIbus.
7-0r/w A24LOW[7-0] A24 Window Lower Bound
These bits define the lower limit of the range of MXIbus A24
addresses that map into the VXIbus.
This register defines the range of MXIbus A24 addresses that map into the VXIbus where that
range is:
A24HIGH > range A24LOW
The VXIbus A24 addresses mapped out of the VXI-MXI are the inverse of this range, that is,
MXIbus A24 addresses greater than or equal to the A24HIGH value or less than the A24LOW
value.
To map a consecutive range of VXIbus A24 addresses out of the VXI-MXI, the lower bound of
the range must be placed in the A24HIGH field and the upper bound in the A24LOW field. In
this case the range of VXIbus A24 addresses mapped out of the VXI-MXI is:
A24LOW > range A24HIGH
The MXIbus A24 addresses mapped into the VXIbus are the inverse of this range, that is,
VXIbus A24 addresses greater than or equal to the A24LOW value or less than the A24HIGH
value.
The window is disabled whenever A24HIGH = A24LOW = 0. All VXIbus A24 addresses are
mapped out to the MXIbus when:
FF (hex) (A24HIGH = A24LOW) 80 (hex)
All MXIbus A24 addresses are mapped into the VXIbus when:
7F (hex) (A24HIGH = A24LOW) > 0