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Theory of Operation Chapter 6
VXI-MXI User Manual 6-14 © National Instruments Corporation
For example, if the VXI-MXI owns the VMEbus and it receives a VMEbus bus request from
another VXIbus device, the VXI-MXI continues holding the VMEbus and arbitrates for the
MXIbus. When it wins the MXIbus, the VXI-MXI can then release the VMEbus so that another
VMEbus requester can gain ownership of the VMEbus. Likewise, if the VXI-MXI owns the
MXIbus and receives a MXIbus request from another device, the VXI-MXI continues to hold the
MXIbus BUSY* line while it arbitrates for its VMEbus. Once it wins the VMEbus, it can
release the MXIbus.
Transparent interoperability between VXIbus mainframes is an advantage of interlocked
arbitration mode; however, this mode of operation does have disadvantages. In normal operation
mode, the VMEbus activity within each mainframe is independent of the activity in other
mainframes except when a device in one mainframe accesses a device in another mainframe. In
interlocked arbitration mode, there can be only one master of the entire VXIbus/MXIbus system
at a time. Devices in separate mainframes, therefore, cannot run operations in parallel. The
global arbitration scheme required by interlocked arbitration mode also adds considerable
overhead to each VMEbus access.
In a VXIbus/MXIbus system, some VXI-MXIs can be configured for normal operation mode and
others for interlocked arbitration mode. The VXIbus mainframes configured in interlocked
arbitration mode are interlocked with each other and the mainframes configured for normal
operation can perform transfers in parallel. If no bus masters are in a VXIbus mainframe, or if
the bus masters communicate only with the slaves in their mainframe and never attempt transfers
across the MXIbus, a deadlock cannot occur. These VXIbus mainframes can be configured for
normal operation in a VXIbus/MXIbus system with VXIbus mainframes configured for
interlocked arbitration mode. Even though PCs with MXIbus interfaces do not support
interlocked arbitration mode, they can be installed in a VXIbus/MXIbus system with VXIbus
mainframes running in interlocked mode.