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© National Instruments Corporation 4-1 VXI-MXI User Manual
Chapter 4
Register Descriptions
This chapter contains detailed information on the use of the VXI-MXI registers, which are used
to configure and control the module's operation. All of these configuration registers are
accessible from the VMEbus (in the VXIbus configuration space) and from the MXIbus. If you
are not writing your own multiframe Resource Manager routines, you can skip over this chapter.
Register Maps
The register map for the VXI-MXI configuration registers is shown in Table 4-1 and Figure 4-1.
The table gives the register name, the register address, the size of the register in bits, and the type
of the register (read only, write only, or read/write). The base address for the VXI-MXI
configuration space in A16 space is equal to the VXIbus logical address assigned to the
VXI-MXI shifted left six times and ORed with hex C000.
Register Sizes
The VMEbus supports three different transfer sizes for read/write operations: 8-bit, 16-bit, or
32-bit. Table 4-1 shows the size of the registers on the VXI-MXI. All 16-bit registers can be
accessed using 8-bit read/write operations.
Register Description Format
Each register bit map shows a diagram of the register with the most significant bit (bit 15 for a
16-bit register, bit 7 for an 8-bit register) shown on the left, and the least significant bit (bit 0)
shown on the right. A square is used to represent each bit. Each bit is labeled with a name inside
its square. An asterisk (*) after the bit name indicates that the signal is active low. An asterisk is
equivalent to an overbar.
Hard and Soft Reset
Each register description indicates whether the bits are cleared by a hard and/or soft reset. A
hard reset occurs when the mainframe is powered on and when the VMEbus SYSRESET signal
is active. A hard reset clears all the registers on the VXI-MXI. A soft reset occurs when the
RESET bit in the VXIbus Control Register is set. A soft reset clears signals that are asserted by
bits in the configuration registers but does not clear configuration information stored in the
configuration registers.