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Register Descriptions Chapter 4
VXI-MXI User Manual 4-22 © National Instruments Corporation
A32 Window Map Register
VXIbus Address: Base Address + 10 (hex)
Attributes: Read/Write
This register defines the range of addresses in A32 space that are mapped into and out of the
VXI-MXI through the MXIbus. These bits are cleared on a hard reset.
The CMODE bit in the MXIbus Control Register selects the format of this register. If the
CMODE bit is 0 (default), a Base/Size window comparison is used to determine the range of
addresses in the window. If the CMODE bit is set, an upper and lower bound is used to
determine the range of addresses in the window.
The A32 Window Map Register has the following format when the CMODE bit is cleared:
R
15 14 13 12 11 10 9
0 A32EN A32DIR 1 1 A32SIZE2 A32SIZE1 A32SIZE0
8
0
A32EN
A32DIR 0 0 A32SIZE2 A32SIZE1 A32SIZE0
W
7
654321
A32BASE7 A32BASE6 A32BASE5 A32BASE4 A32BASE3 A32BASE2 A32BASE1 A32BASE0
0
R/W
Bit Mnemonic Description
15r/w 0 Reserved Bit
This bit is reserved and reads back as zero. Write a zero when
writing to these bits.
14r/w A32EN A32 Window Enable Bit
When this bit is set, the A32 mapping window is enabled. When
this bit is cleared, the A32 mapping window is disabled.
13r/w A32DIR A32 Window Direction Bit
When this bit is set, the A32 window applies to MXIbus cycles that
are mapped into VXIbus cycles (inward cycles). When this bit is
cleared, the A32 window applies to VXIbus cycles that are mapped
out into MXIbus cycles (outward cycles). The complement of the
defined range is mapped in the opposite direction.