Xilinx DS610 Switch User Manual


 
Pinout Descriptions
80 www.xilinx.com DS610-4 (v2.0) July 16, 2007
Product Specification
R
User I/Os by Bank
Table 64 indicates how the available user-I/O pins are distributed between the four I/O banks on the FG676 package. The
AWAKE pin is counted as a Dual-Purpose I/O.
Table 64:
User I/Os Per Bank for the XC3SD1800A in the FG676 Package
Package
Edge
I/O Bank
Maximum I/Os
and
Input-Only
All Possible I/O Pins by Type
I/O INPUT DUAL VREF
(1)
CLK
Top 0 128 82 28 1 9 8
Right 1 130 67 15 30 10 8
Bottom 2 129 68 21 21 11 8
Left 3 132 97 18 0 9 8
TOTAL 519 314 82 52 39 32
Notes:
1. 28 VREF are on INPUT pins.