AMD 250 Computer Hardware User Manual


 
114 Cache and Memory Optimizations Chapter 5
25112 Rev. 3.06 September 2005
Software Optimization Guide for AMD64 Processors
5.9 L1 Data Cache Bank Conflicts
Optimization
Utilize pair loads that do not have a bank conflict in the L1 data cache to improve load thoughput.
Application
This optimization applies to:
32-bit software
64-bit software
Fields Used to Address the Multibank L1 Data Cache
The L1 data cache is a multibank design consisting of 8 banks total, where each bank is 8 bytes wide.
To address the L1 data cache, the processor uses fields within the address as shown in the following
diagram:
How to Know If a Bank Conflict Exists
The existence of a bank conflict between two neighboring loads depends on their bank and index
values:
In other words, with common data types, consecutive array elements cannot have a bank conflict. If
the array elements are 4 bytes or less, the two loads are to the same index and the same bank, and no
conflict occurs. If the array elements are 8 bytes, the loads are to the same index but different banks,
so a bank conflict does not occur either.
When the bank is And the index is Then a bank conflict
Different Either the same or different Does not exist
The same The same Does not exist
The same Different Exists
Index
14 0
Byte
Bank
2356
...