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Appendix A Microarchitecture for AMD Athlon™ 64 and AMD Opteron™ Processors 249
Software Optimization Guide for AMD64 Processors
25112 Rev. 3.06 September 2005
Appendix A Microarchitecture for
AMD Athlon™ 64 and
AMD Opteron™ Processors
When discussing processor design, it is important to understand the terms architecture,
microarchitecture, and design implementation.
The architecture consists of the instruction set and those features of a processor that are visible to
software programs running on the processor. The architecture determines what software the processor
can run. The AMD64 architecture of the AMD Athlon™ 64 and AMD Opteron™ processors is
compatible with the industry-standard x86 instruction set.
The term microarchitecture refers to the design features used to reach the target cost, performance,
and functionality goals of the processor. The AMD64 architecture employs a decoupled
decode/execution design approach. In other words, decoders and execution units essentially operate
independently; the execution core uses a small number of instructions and simplified circuit design
for fast single-cycle execution and fast operating frequencies.
The design implementation refers to a particular combination of physical logic and circuit elements
that comprise a processor that meets the microarchitecture specifications.
This appendix covers the following topics:
Topic Page
Key Microarchitecture Features 250
Microarchitecture for AMD Athlon™ 64 and AMD Opteron™ Processors 251
Superscalar Processor 251
Processor Block Diagram 251
L1 Instruction Cache 252
Branch-Prediction Table 253
Fetch-Decode Unit 254
Instruction Control Unit 254
Translation-Lookaside Buffer 254
L1 Data Cache 255
Integer Scheduler 256
Integer Execution Unit 256
Floating-Point Scheduler 257
Floating-Point Execution Unit 258