AMD 250 Computer Hardware User Manual


 
64 General 64-Bit Optimizations Chapter 3
25112 Rev. 3.06 September 2005
Software Optimization Guide for AMD64 Processors
The following procedure performs 64-bit unsigned integer multiplication, as previously illustrated
using 32-bit integer operations:
; 32bitalu_64x64(int *a, int *b, int *c);
;
; TO ASSEMBLE INTO *.obj DO THE FOLLOWING:
; ml.exe -coff -c 32bitalu_64x64.asm
;
.586
.K3D
.XMM
_DATA SEGMENT
tempESP dd 0
_DATA ENDS
_TEXT SEGMENT
ASSUME DS:_DATA
PUBLIC _32bitalu_64x64
_32bitalu_64x64 PROC NEAR
;==============================================================================
; Save the register state. Registers EAX, ECX, and EDX are considered volatile
; and assumed to be changed, while the registers below must be preserved.
push ebp
mov ebp, esp
;==============================================================================
; Parameters passed into routine:
; [ebp+8] = ->a
; [ebp+12] = ->b
; [ebp+16] = ->c
;==============================================================================
push ebx
push esi
push edi
;==============================================================================
mov esi,[ebp+8] ; ESI = ->a
mov edi,[ebp+12] ; EDI = ->b
mov ecx,[ebp+16] ; ECX = ->c
push ebp
mov [tempESP], esp
;==============================================================================
; Multiply 64-bit numbers a and b, each of which is composed of two 32-bit
; components:
; a = a1 * 2^32 + a0
; b = b1 * 2^32 + b0
mov eax,[esi] ; EAX = a0
mov edx,[edi] ; EDX = b0
mul edx ; EDX:EAX = a0*b0 = d1:d0
mov ebx,edx ; EDX = d1
mov [ecx],eax ; c0 = EAX
xor esp,esp ; ESP = 0
xor ebp,ebp ; EBP = 0