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Chapter 7 Scheduling Optimizations 151
Software Optimization Guide for AMD64 Processors
25112 Rev. 3.06 September 2005
7.4 Address-Generation Interlocks
Optimization
Avoid address-generation interlocks by scheduling loads and stores whose addresses can be
calculated quickly ahead of loads and stores that require the resolution of a long dependency chain in
order to generate their addresses.
Application
This optimization applies to:
• 32-bit software
• 64-bit software
Address-Generation Interlocks
An address-generation interlock is a condition in which newer loads and stores whose addresses have
already been calculated by the processor are blocked by older loads and stores whose addresses have
not yet been calculated.
Rationale
The processor schedules instructions that access the data cache (loads and stores) in program order.
By carefully choosing the order of loads and stores, you can avoid address-generation interlocks.