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TMS320DM355
DigitalMediaSystem-on-Chip(DMSoC)
SPRS463A–SEPTEMBER2007–REVISEDSEPTEMBER2007
5.7.1.3AEMIFElectricalData/Timing
Table5-13.TimingRequirementsforAsynchronousMemoryCyclesforAEMIFModule
(1)
(seeFigure5-14
andFigure5-15)
DM355
NO
UNIT
.
MINNomMAX
READSandWRITES
Pulseduration,EM_WAITassertionand
2t
w(EM_WAIT)
2Ens
deassertion
READS
12t
su(EMDV-EMOEH)
Setuptime,EM_D[15:0]validbeforeEM_OEhigh5ns
13t
h(EMOEH-EMDIV)
Holdtime,EM_D[15:0]validafterEM_OEhigh0ns
t
su(EMOEL-
DelaytimefromEM_OElowtoEM_WAIT
144Ens
EMWAIT)
asserted
(2)
READS(OneNANDSynchronousBurstRead)
Setuptime,EM_D[15:0]validbeforeEM_CLK
30t
su(EMDV-EMCLKH)
4ns
high
31t
h(EMCLKH-EMDIV)
Holdtime,EM_D[15:0]validafterEM_CLKhigh4ns
WRITES
t
su(EMWEL-
DelaytimefromEM_WElowtoEM_WAIT
284Ens
EMWAIT)
asserted
(2)
(1)E=PLLC1SYSCLK2periodinns.SYSCLK2istheEMIFperipheralclock.SYSCLK2isone-fourththePLLCoutputclock.Forexample,
whenPLLCoutputclock=432MHz,E=9.259ns.SeeSection3.5formoreinformation.
(2)SetupbeforeendofSTROBEphase(ifnoextendedwaitstatesareinserted)bywhichEM_WAITmustbeassertedtoaddextended
waitstates.Figure5-16andFigure5-17describeEMIFtransactionsthatincludeextendedwaitstatesinsertedduringtheSTROBE
phase.However,cyclesinsertedaspartofthisextendedwaitperiodshouldnotbecounted;the4Erequirementistothestartofwhere
theHOLDphasewouldbeginiftherewerenoextendedwaitcycles.
Table5-14.SwitchingCharacteristicsOverRecommendedOperatingConditionsforAsynchronous
MemoryCyclesforAEMIFModule
(1)(2)(3)
(seeFigure5-14andFigure5-15)
DM355
UNI
NO.PARAMETER
T
MINNomMAX
READSandWRITES
1t
d(TURNAROUND)
Turnaroundtime(TA)*Ens
READS
EMIFreadcycletime(EW=0)(RS+RST+RH)*Ens
3t
c(EMRCYCLE)
(RS+RST+RH+(EWC*
EMIFreadcycletime(EW=1)ns
16))*E
Outputsetuptime,EM_CE[1:0]lowto
(RS)*Ens
EM_OElow(SS=0)
4t
su(EMCEL-EMOEL)
Outputsetuptime,EM_CE[1:0]lowto
0ns
EM_OElow(SS=1)
Outputholdtime,EM_OEhighto
(RH)*Ens
EM_CE[1:0]high(SS=0)
5t
h(EMOEH-EMCEH)
Outputholdtime,EM_OEhighto
0ns
EM_CE[1:0]high(SS=1)
(1)TA=Turnaround,RS=Readsetup,RST=Readstrobe,RH=Readhold,WS=Writesetup,WST=Writestrobe,WH=Writehold,
MEWC=Maximumexternalwaitcycles.TheseparametersareprogrammedviatheAsynchronousBankandAsynchronousWaitCycle
ConfigurationRegisters.Thesesupportthefollowingrangeofvalues:TA[4-1],RS[16-1],RST[64-1],RH[8-1],WS[16-1],WST[64-1],
WH[8-1],andMEW[1-256].SeetheTMS320DM355DMSoCAsynchronousExternalMemoryInterface(EMIF)User'sGuide(SPRUED1)
formoreinformation.
(2)E=PLLC1SYSCLK2periodinns.SYSCLK2istheEMIFperipheralclock.SYSCLK2isone-fourththePLLCoutputclock.Forexample,
whenPLLCoutputclock=432MHz,E=9.259ns.SeeSection3.5formoreinformation
(3)EWC=externalwaitcyclesdeterminedbyEM_WAITinputsignal.EWCsupportsthefollowingrangeofvaluesEWC[256-1].Notethat
themaximumwaittimebeforetimeoutisspecifiedbybitfieldMEWCintheAsynchronousWaitCycleConfigurationRegister.Seethe
TMS320DM355DMSoCAsynchronousExternalMemoryInterface(EMIF)User'sGuide(SPRUED1)formoreinformation.
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