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PRODUCT PREVIEW
TMS320DM355
DigitalMediaSystem-on-Chip(DMSoC)
SPRS463A–SEPTEMBER2007–REVISEDSEPTEMBER2007
DMAChannels:Canbetriggeredby:"Externalevents(forexample,ASPTXEvtandRXEvt),"Software
writinga'1'tothegivenbitlocation,orchannel,oftheEventSetregister,or,"ChainingtootherDMAs.
QDMA:TheQuickDMA(QDMA)functioniscontainedwithintheCC.DM355implements8QDMA
channels.EachQDMAchannelhasaselectablePaRAMentryusedtospecifythetransfer.AQDMA
transferissubmittedimmediatelyuponwritingofthe"trigger"parameter(asopposedtotheoccurrenceof
aneventaswithEDMA).TheQDMAparameterRAMmaybewrittenbyanyConfigbusmasterthrough
theConfigBusandbyDMAsthroughtheConfigBusbridge.
QDMAChannels:Triggeredbyaconfigurationbuswritetoadesignated'QDMAtriggerword'.QDMAs
allowaminimumnumberoflinearwrites(optimizedforGEMIDMAfeature)tobeissuedtotheCCto
forceaseriesoftransferstotakeplace.
3.14.2.1EDMAChannelSynchronizationEvents
TheEDMAsupportsupto64EDMAchannelswhichserviceperipheraldevicesandexternalmemory.
Table3-19liststhesourceofEDMAsynchronizationeventsassociatedwitheachoftheprogrammable
EDMAchannels.Forthedevice,theassociationofaneventtoachannelisfixed;eachoftheEDMA
channelshasonespecificeventassociatedwithit.ThesespecificeventsarecapturedintheEDMAevent
registers(ER,ERH)eveniftheeventsaredisabledbytheEDMAeventenableregisters(EER,EERH).
FormoredetailedinformationontheEDMAmoduleandhowEDMAeventsareenabled,captured,
processed,linked,chained,andcleared,etc.,seetheDocumentSupportsectionfortheEnhancedDirect
MemoryAccess(EDMA)ControllerReferenceGuide.
Table3-19.EDMAChannelSynchronizationEvents
(1)(2)
EDMA
EVENTNAMEEVENTDESCRIPTION
CHANNEL
0TIMER3:TINT6Timer3Interrupt(TINT6)Event
1TIMER3TINT7Timer3Interrupt(TINT7)Event
2ASP0:XEVTASP0TransmitEvent
3ASP0:REVTASP0ReceiveEvent
4VPSS:EVT1VPSSEvent1
5VPSS:EVT2VPSSEvent2
6VPSS:EVT3VPSSEvent3
7VPSS:EVT4VPSSEvent4
ASP1:XEVTorTIMER2:
8ASP1TransmitEventorTimer2interrupt(TINT4)Event
TINT4
ASP1:REVTorTIMER2:
9ASP1ReceiveEventorTimer2interrupt(TINT5)Event
TINT5
10SPI2:SPI2XEVTSPI2TransmitEvent
11SPI2:SPI2REVTSPI2ReceiveEvent
12Reserved
13Reserved
14SPI1:SPI1XEVTSPI1TransmitEvent
15SPI1:SPI1REVTSPI1ReceiveEvent
16SPI0:SPI0XEVTSP0ITransmitEvent
17SPI0:SPI0REVTSPI0ReceiveEvent
18UART0:URXEVT0UART0ReceiveEvent
19UART0:UTXEVT0UART0TransmitEvent
20UART1:URXEVT1UART1ReceiveEvent
(1)Inadditiontotheeventsshowninthistable,eachofthe64channelscanalsobesynchronizedwiththetransfercompletionor
intermediatetransfercompletionevents.FormoredetailedinformationonEDMAevent-transferchaining,seetheDocumentSupport
sectionfortheEnhancedDirectMemoryAccess(EDMA)ControllerReferenceGuide.
(2)ThetotalnumberofEDMAeventsinDM355exceeds64,whichisthemaximumvalueoftheEDMAmodule.Therefore,severalevents
aremultiplexedandyoumustusetheregisterEDMA_EVTMUXintheSystemControlModuletoselecttheeventsourceformultiplexed
events.RefertotheARMSubsystemGuideformoreinformationontheSystemControlModuleregisterEDMA_EVTMUX.
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