Filter
Top Products
www.ti.com
PRODUCT PREVIEW
5.9VideoProcessingSub-System(VPSS)Overview
5.9.1VideoProcessingFront-End(VPFE)
TMS320DM355
DigitalMediaSystem-on-Chip(DMSoC)
SPRS463A–SEPTEMBER2007–REVISEDSEPTEMBER2007
ThecontainsaVideoProcessingSub-System(VPSS)thatprovidesaninputinterface(VideoProcessing
FrontEndorVPFE)forexternalimagingperipheralssuchasimagesensors,videodecoders,etc.;andan
outputinterface(VideoProcessingBackEndorVPBE)fordisplaydevices,suchasanalogSDTV
displays,digitalLCDpanels,HDTVvideoencoders,etc.
Inadditiontotheseperipherals,thereisasetofcommonbuffermemoryandDMAcontroltoensure
efficientuseoftheDDR2burstbandwidth.Thesharedbufferlogic/memoryisauniqueblockthatis
tailoredforseamlesslyintegratingtheVPSSintoanimage/videoprocessingsystem.Itactsastheprimary
sourceorsinktoalltheVPFEandVPBEmodulesthatareeitherrequestingortransferringdatafrom/to
DDR2.InordertoefficientlyutilizetheexternalDDR2bandwidth,thesharedbufferlogic/memory
interfaceswiththeDMAsystemviaahighbandwidthbus(64-bitwide).Thesharedbufferlogic/memory
alsointerfaceswithalltheVPFEandVPBEmodulesviaa128-bitwidebus.Thesharedbuffer
logic/memory(dividedintotheread&writebuffersandarbitrationlogic)iscapableofperformingthe
followingfunctions.ItisimperativethattheVPSSutilizeDDR2bandwidthefficientlyduetobothitslarge
bandwidthrequirementsandthereal-timerequirementsoftheVPSSmodules.Becauseitispossibleto
configuretheVPSSmodulesinsuchawaythatDDR2bandwidthisexceeded,asetofuseraccessible
registersisprovidedtomonitoroverflowsorfailuresindatatransfers.
TheVPFEorVideoProcessingFront-EndblockiscomprisedoftheCCDController(CCDC),ImagePipe
(IPIPE),andHardware3AStatisticGenerator(H3A).Thesemodulesaredescribedinthesectionsthat
follow.
5.9.1.1CCDController(CCDC)
TheCCDCisresponsibleforacceptingraw(unprocessed)image/videodatafromasensor(CMOSor
CCD).Inaddition,theCCDCcanacceptYUVvideodatainnumerousformats,typicallyfromso-called
videodecoderdevices.Inthecaseofrawinputs,theCCDCoutputrequiresadditionalimageprocessing
totransformtherawinputimagetothefinalprocessedimage.Thisprocessingcanbedoneeither
on-the-flyinthePreviewEnginehardwareISPorinsoftwareontheARMandMPEG/JPEGco-processor
subsystems.Inparallel,rawdatainputtotheCCDCcanalsousedforcomputingvariousstatistics(3A,
Histogram)toeventuallycontroltheimage/videotuningparameters.TheCCDCisprogrammedviacontrol
andparameterregisters.DM355performanceisenhancedbyitsdedicatedhard-wiredMPEG/JPEG
co-processor(MJCP).TheMJCPperformsallthecomputationaloperationsrequiredforJPEandMPEG4
compression.TheseoperationscanbeinvokedusingthexDM(xDIASforDigitalMedia)APIs.Formore
information,refertothexDIAS-DM(xDIASforDigitalMedia)User'sGuide(SPRUEC8).Thefollowing
featuresaresupportedbytheCCDCmodule.
•SupportforconventionalBayerpattern.
•GeneratesHD/VDtimingsignalsandfieldIDtoanexternaltiminggeneratororcansynchronizetothe
externaltiminggenerator.
•Supportforprogressiveandinterlacedsensors(hardwaresupportforupto2fieldsandfirmware
supportforhighernumberoffields,typically3-,4-,and5-fieldsensors).
•Supportforupto67.5MHzsensorclock(270-MHzspeedgradedevice)
•SupportforREC656/CCIR-656standard(YCbCr422format,either8-or16-bit).
•SupportforYCbCr422format,either8-or16-bitwithdiscreteHandVSYNCsignals.
•Supportforupto14-bitinput.
•Supportforcolorspaceconversion
•Generatesopticalblackclampingsignals.
•Supportforshuttersignalcontrol.
•Supportfordigitalclampingandblacklevelcompensation.
•Faultpixelcorrectionbasedonalookuptablethatcontainsrowandcolumnpositionofthepixeltobe
corrected.
SubmitDocumentationFeedbackPeripheralInformationandElectricalSpecifications115