Texas Instruments TMS320DM355 Computer Hardware User Manual


 
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PRODUCT PREVIEW
TMS320DM355
DigitalMediaSystem-on-Chip(DMSoC)
SPRS463ASEPTEMBER2007REVISEDSEPTEMBER2007
Table2-23.DM355PinDescriptions(continued)
NameBGATypeGroupPowerPUResetDescription
(4)
MuxControl
ID
(1)
Supply
(2)
PD
(3)
State
DDR_DQS[0]V12I/ODDRV
DD_DDR
inDatastrobeinput/outputsforeachbyteof
the16bitdatabususedtosynchronizethe
datatransfers.OutputtoDDRwhenwriting
andinputswhenreading.
DQS0:ForDDR_DQ[7:0]
DDR_BA[2]V8I/ODDRV
DD_DDR
outLBankselectoutputs.Twoarerequiredfor
1GbDDR2memories.
DDR_BA[1]U7I/ODDRV
DD_DDR
outLBankselectoutputs.Twoarerequiredfor
1GbDDR2memories.
DDR_BA[0]U8I/ODDRV
DD_DDR
outLBankselectoutputs.Twoarerequiredfor
1GbDDR2memories.
DDR_A13U6I/ODDRV
DD_DDR
outLDDRAddressBusbit13
DDR_A12V7I/ODDRV
DD_DDR
outLDDRAddressBusbit12
DDR_A11W7I/ODDRV
DD_DDR
outLDDRAddressBusbit11
DDR_A10V6I/ODDRV
DD_DDR
outLDDRAddressBusbit10
DDR_A09W6I/ODDRV
DD_DDR
outLDDRAddressBusbit09
DDR_A08W5I/ODDRV
DD_DDR
outLDDRAddressBusbit08
DDR_A07V5I/ODDRV
DD_DDR
outLDDRAddressBusbit07
DDR_A06U5I/ODDRV
DD_DDR
outLDDRAddressBusbit06
DDR_A05W4I/ODDRV
DD_DDR
outLDDRAddressBusbit05
DDR_A04V4I/ODDRV
DD_DDR
outLDDRAddressBusbit04
DDR_A03W3I/ODDRV
DD_DDR
outLDDRAddressBusbit03
DDR_A02W2I/ODDRV
DD_DDR
outLDDRAddressBusbit02
DDR_A01V3I/ODDRV
DD_DDR
outLDDRAddressBusbit01
DDR_A00V2I/ODDRV
DD_DDR
outLDDRAddressBusbit00
DDR_DQ15W17I/ODDRV
DD_DDR
inDDRDataBusbit15
DDR_DQ14V16I/ODDRV
DD_DDR
inDDRDataBusbit14
DDR_DQ13W16I/ODDRV
DD_DDR
inDDRDataBusbit13
DDR_DQ12U16I/ODDRV
DD_DDR
inDDRDataBusbit12
DDR_DQ11W15I/ODDRV
DD_DDR
inDDRDataBusbit11
DDR_DQ10W14I/ODDRV
DD_DDR
inDDRDataBusbit10
DDR_DQ09V14I/ODDRV
DD_DDR
inDDRDataBusbit09
DDR_DQ08U13I/ODDRV
DD_DDR
inDDRDataBusbit08
DDR_DQ07W13I/ODDRV
DD_DDR
inDDRDataBusbit07
DDR_DQ06V13I/ODDRV
DD_DDR
inDDRDataBusbit06
DDR_DQ05W12I/ODDRV
DD_DDR
inDDRDataBusbit05
DDR_DQ04U12I/ODDRV
DD_DDR
inDDRDataBusbit04
DDR_DQ03T11I/ODDRV
DD_DDR
inDDRDataBusbit03
DDR_DQ02U11I/ODDRV
DD_DDR
inDDRDataBusbit02
DDR_DQ01W11I/ODDRV
DD_DDR
inDDRDataBusbit01
DDR_DQ00V11I/ODDRV
DD_DDR
inDDRDataBusbit00
DDR_GATE0W18I/ODDRV
DD_DDR
DDR:LoopbacksignalforexternalDQS
gating.RoutetoDDRandbackto
DDR_STRBEN_DELwithsameconstraints
asusedforDDRclockanddata.
DDR_GATE1V17I/ODDRV
DD_DDR
DDR:LoopbacksignalforexternalDQS
gating.RoutetoDDRandbackto
DDR_STRBENwithsameconstraintsas
usedforDDRclockanddata.
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