Filter
Top Products
www.ti.com
PRODUCT PREVIEW
5.8MMC/SD
5.8.1MMC/SDElectricalData/Timing
TMS320DM355
DigitalMediaSystem-on-Chip(DMSoC)
SPRS463A–SEPTEMBER2007–REVISEDSEPTEMBER2007
TheDM355includestwoseparateMMC/SDControllerswhicharecompliantwithMMCV3.31,Secure
DigitalPart1PhysicalLayerSpecificationV1.1andSecureDigitalInputOutput(SDIO)V1.0
specifications.
TheMMC/SDControllerhasfollowingfeatures:
•MultiMediaCard(MMC).
•SecureDigital(SD)MemoryCard.
•MMC/SDprotocolsupport.
•SDIOprotocolsupport.
•Programmableclockfrequency.
•256bitRead/WriteFIFOtolowersystemoverhead.
•SlaveEDMAtransfercapability.
TheMMC/SDControllerdoesnotsupportSPImode.
Table5-15.TimingRequirementsforMMC/SDModule
(seeFigure5-20andFigure5-22)
DM355
NO.FASTMODESTANDARDMODEUNIT
MINMAXMINMAX
1t
su(CMDV-CLKH)
Setuptime,SD_CMDvalidbeforeSD_CLKhigh65ns
2t
h(CLKH-CMDV)
Holdtime,SD_CMDvalidafterSD_CLKhigh2.5
(1)
5ns
3t
su(DATV-CLKH)
Setuptime,SD_DATxvalidbeforeSD_CLKhigh65ns
4t
h(CLKH-DATV)
Holdtime,SD_DATxvalidafterSD_CLKhigh2.55ns
(1)Forthisparameter,youmayincludemargininyourboarddesignsothatthetoh=2.5nsoftheMMC/SDdeviceisnotdegradedatthe
DM355inputpin.
Table5-16.SwitchingCharacteristicsOverRecommendedOperatingConditionsforMMC/SDModule
(seeFigure5-19throughFigure5-22)
DM355
STANDARD
NO.PARAMETERFASTMODEUNIT
MODE
MINMAXMINMAX
7f
(CLK)
Operatingfrequency,SD_CLK050025MHz
8f
(CLK_ID)
Identificationmodefrequency,SD_CLK04000400KHz
9t
W(CLKL)
Pulsewidth,SD_CLKlow710ns
10t
W(CLKH)
Pulsewidth,SD_CLKhigh710ns
11t
r(CLK)
Risetime,SD_CLK310ns
12t
f(CLK)
Falltime,SD_CLK310ns
t
d(CLKL-
13Delaytime,SD_CLKlowtoSD_CMDtransition-7.54-7.514ns
CMD)
14t
d(CLKL-DAT)
Delaytime,SD_CLKlowtoSD_DATxtransition-7.54-7.514ns
SubmitDocumentationFeedbackPeripheralInformationandElectricalSpecifications113