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TMS320DM355
DigitalMediaSystem-on-Chip(DMSoC)
SPRS463A–SEPTEMBER2007–REVISEDSEPTEMBER2007
Table2-23.DM355PinDescriptions(continued)
NameBGATypeGroupPowerPUResetDescription
(4)
MuxControl
ID
(1)
Supply
(2)
PD
(3)
State
EM_WE/J15I/OAEMIV
DD
outHAsyncEMIF:WriteEnablePINMUX2[8].EM_W
GIO035F/E_OE
GIO
NAND/SM/xD:WE(WriteEnable)output
GIO:GIO[035]
EM_OE/F19I/OAEMIV
DD
outHAsyncEMIF:OutputEnablePINMUX2[8].EM_W
GIO034F/E_OE
GIO
NAND/SM/xD:RE(ReadEnable)output
GIO:GIO[034]
EM_WAIT/G18I/OAEMIV
DD
PUinHAsyncEMIF:AsyncWAITPINMUX2[9].EM_W
GIO033F/AIT
GIO
NAND/SM/xD:RDY/_BSYinput
GIO:GIO[033]
EM_ADV/H16I/OAEMIV
DD
PDinLOneNAND:AddressValidDetectforPINMUX2[10].EM_A
GIO032F/OneNANDinterfaceDV
GIO
GIO:GIO[032]
EM_CLK/E19I/OAEMIV
DD
outLOneNAND:ClocksignalforOneNANDflashPINMUX2[11].EM_C
GIO031F/interfaceLK
GIO
GIO:GIO[031]
ASP0_DX/H15I/OASP5V
DD
inASP0:TransmitDataPINMUX3[0].GIO30
GIO030120/
GIO
GIO:GIO[030]
ASP0_CLKX/F18I/OASP5V
DD
inASP0:TransmitClockPINMUX3[1].GIO29
GIO029120/
GIO
GIO:GIO[029]
ASP0_FSX/G17I/OASP5V
DD
inASP0:TransmitFrameSynchPINMUX3[2].GIO28
GIO028120/
GIO
GIO:GIO[028]
ASP0_DR/E18I/OASP5V
DD
inASP0:ReceiveDataPINMUX3[3].GIO27
GIO027120/
GIO
GIO:GIO[027]
ASP0_CLKR/F17I/OASP5V
DD
inASP0:ReceiveClockPINMUX3[4].GIO26
GIO026120/
GIO
GIO:GIO[026]
ASP0_FSR/F16I/OASP5V
DD
inASP0:ReceiveFrameSynchPINMUX3[5].GIO25
GIO025120/
GIO
GIO:GIO[025]
MMCSD1_CLK/C15I/OMMCV
DD
inMMCSD1:ClockPINMUX3[6].GIO24
GIO024SD/
GIO
GIO:GIO[024]
MMCSD1_CMDA17I/OMMCV
DD
inMMCSD1:CommandPINMUX3[7].GIO23
/GIO023SD/
GIO
GIO:GIO[023]
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