Anritsu 373XXA Network Router User Manual


 
6-3 LO 2 CALIBRATION ·······················6-4
Calibration Procedure ·······················6-4
Post Calibration Actions······················6-5
6-4 FREQUENCY CALIBRATION ··················6-5
Calibration Procedure ·······················6-6
Post Calibration Actions······················6-7
6-5 RF POWER/ALC CALIBRATION·················6-8
Calibration Procedure ·······················6-9
Post Calibration Actions ·····················6-10
6-6 SOURCE LOCK THRESHOLD ·················6-11
Calibration Procedure ······················6-12
Post Calibration Actions ·····················6-12
6-7 A8 ADJUSTMENT (37397A) ··················6-13
Calibration Procedure ······················6-13
Post Calibration Actions ·····················6-13
6-8 A21A2 ADJUSTMENT (37397A) ················6-14
Calibration Procedure ······················6-14
Post Calibration Actions ·····················6-15
Chapter 7 System Description
7-1 INTRODUCTION ·························7-3
7-2 SYSTEM OVERVIEW ·······················7-3
7-3 ANALOG SUBSYSTEM ASSEMBLIES ·············7-7
Signal Source Module ·······················7-7
Test Set Module ··························7-8
A7 PCB, 10 MHz Timebase···················7-9
Receiver Module ·························7-10
A8, Source Lock/ Signal Separation and Control PCB ·····7-11
IF Section ·····························7-11
A7PCB,LO3 ··························7-12
A5 A/D Converter PCB ······················7-12
7-4 DIGITAL SUBSYSTEM ASSEMBLIES ·············7-13
A9 Main Processor PCB Assembly················7-13
A13 I/O Interface #1 PCB Assembly···············7-15
A14 I/O Interface #2 PCB Assembly···············7-15
A15 Graphics Processor PCB Assembly ·············7-16
A16 Hard Disk PCB Assembly··················7-16
Floppy Disk Drive Assembly ···················7-16
A24 VME Bus Terminator PCB ·················7-16
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