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Chapter 3 Power-On Self-Test 3-7
3.4.1 diag-level Variable Set to max
When the diag-level variable is set to max, POST enables an extended set of
diagnostic-level tests. This mode requires approximately 2 minutes and 15 seconds
to complete (with 128 Mbytes of DIMM installed).
CODE EXAMPLE 3-1 identifies a
typical serial port A POST output with the diag-level variable set to max
CODE EXAMPLE 3-1 diag-level Variable Set to max
Executing Power On SelfTest
0>
0>@(#) Sun Ultra 60(UltraSPARC-II 2-way) UPA/PCI POST x.x.x
xx/xx/xxxx xx:xx PM
0>INFO: Processor 0 is master.
0>
0> <00> Init System BSS
0> <00> NVRAM Battery Detect Test
0> <00> NVRAM Scratch Addr Test
0> <00> DMMU TLB Tag Access Test
0> <00> DMMU TLB RAM Access Test
0> <00> IMMU TLB Tag Access Test
0> <00> IMMU TLB RAM Access Test
0> <00> Probe Ecache
0>INFO:CPU 296 MHz: 2048KB Ecache
0> <00> Ecache RAM Addr Test
0> <00> Ecache Tag Addr Test
0> <00> Ecache Tag Test
0> <00> Invalidate Ecache Tags
0>INFO: Processor 2 - UltraSPARC-II.
0> <00> Init SC Regs
0> <00> SC Address Reg Test
0> <00> SC Reg Index Test
0> <00> SC Regs Test
0> <00> SC Dtag RAM Addr Test
0> <00> SC Cache Size Init
0> <00> SC Dtag RAM Data Test
0> <00> SC Dtag Init
0> <00> Probe Memory
0>INFO:128MB Bank 0
0>INFO: 0MB Bank 1
0>INFO: 0MB Bank 2
0>INFO: 0MB Bank 3
0> <00> Malloc Post Memory
0> <00> Init Post Memory
0> <00> Post Memory Addr Test
0> <00> Map PROM/STACK/NVRAM in DMMU
0> <00>Memory Stack Test