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Chapter 3 Power-On Self-Test 3-13
0>INFO:128MB Bank 0
0>INFO: 0MB Bank 1
0>INFO: 0MB Bank 2
0>INFO: 0MB Bank 3
0> <00> Block Memory Test
0>INFO:128MB Bank 0
0>INFO: 0MB Bank 1
0>INFO: 0MB Bank 2
0>INFO: 0MB Bank 3
0> <00> ECC Blk Memory Test
0>INFO:128MB Bank 0
0>INFO: 0MB Bank 1
0>INFO: 0MB Bank 2
0>INFO: 0MB Bank 3
0> <00> UltraSPARC-2 Prefetch Instructions Test
0> <00>Test 0: prefetch_mr
0> <00>Test 1: prefetch to non-cacheable page
0> <00>Test 2: prefetch to page with dmmu misss
0> <00>Test 3: prefetch miss does not check alignment
0> <00>Test 4: prefetcha with asi 0x4c is noped
0> <00>Test 5: prefetcha with asi 0x54 is noped
0> <00>Test 6: prefetcha with asi 0x6e is noped
0> <00>Test 7: prefetcha with asi 0x76 is noped
0> <00>Test 8: prefetch with fcn 5
0> <00>Test 9: prefetch with fcn 2
0> <00>Test 10: prefetch with fcn 12
0> <00>Test 11: prefetch with fcn 16 is noped
0> <00>Test 12: prefetch with fcn 29 is noped
0> <00>Test 13: prefetcha with asi 0x15 is noped
0> <00>Test 14: prefetch with fcn 3
0> <00>Test 15: prefetcha14 with fcn 2
0> <00>Test 16: prefetcha80_mr
0> <00>Test 17: prefetcha81_1r
0> <00>Test 18: prefetcha10_mw
0> <00>Test 19: prefetcha80_17 is noped
0> <00>Test 20: prefetcha10_6: illegal instruction trap
0> <00>Test 21: prefetcha11_1w
0> <00>Test 22: prefetcha81_31
0> <00>Test 23: prefetcha11_15: illegal instruction trap
2> <00> UltraSPARC-2 Prefetch Instructions Test
2> <00>Test 0: prefetch_mr
2> <00>Test 1: prefetch to non-cacheable page
2> <00>Test 2: prefetch to page with dmmu misss
2> <00>Test 3: prefetch miss does not check alignment
2> <00>Test 4: prefetcha with asi 0x4c is noped
2> <00>Test 5: prefetcha with asi 0x54 is noped
2> <00>Test 6: prefetcha with asi 0x6e is noped
CODE EXAMPLE 3-1 diag-level Variable Set to max (Continued)