Sun Microsystems 60 Computer Hardware User Manual


 
4-16 Sun Ultra 60 Service Manual August 2001
4.7.2 EBus DMA/TCR Registers
The EBus DMA/TCR registers diagnostic performs the following:
1. DMA_reg_test Performs a walking ones bit test for control status register,
address register, and byte count register of each channel. Verifies that the control
status register is set properly.
2. DMA_func_test Validates the DMA capabilities and FIFOs. Test is executed in
a DMA diagnostic loopback mode. Initializes the data of transmitting memory
with its address, performs a DMA read and write, and verifies that the data
received is correct. Repeats for four channels.
CODE EXAMPLE 4-10 identifies the EBus DMA/TCR registers output message.
4.7.3 Ethernet
The Ethernet diagnostic performs the following:
1. my_channel_reset Resets the Ethernet channel.
2. hme_reg_test Performs walk1 on the following registers set: global register 1,
global register 2, bmac xif register, bmac tx register, and the mif register.
3. MAC_internal_loopback_test Performs Ethernet channel engine internal
loopback.
4. 10_mb_xcvr_loopback_test Enables the 10Base-T data present at the
transmit MII data inputs to be routed back to the receive MII data outputs.
5. 100_mb_phy_loopback_test Enables MII transmit data to be routed to the
MII receive data path.
6. 100_mb_twister_loopback_test Forces the twisted-pair transceiver into
loopback mode.
CODE EXAMPLE 4-10 EBus DMA/TCR Registers Output Message
Enter (0-12 tests, 13 -Quit, 14 -Menu) ===> 1
TEST=’all_dma/ebus_test’
SUBTEST=’dma_reg_test’
SUBTEST=’dma_func_test’
Enter (0-12 tests, 13 -Quit, 14 -Menu) ===>