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132 AMD Geode™ SC1200/SC1201 Processor Data Book
SuperI/O Module
32579B
Table 5-38. Bank Selection Encoding
BSR Bits
Bank Selected76543210
0xxxxxxx 0
10xxxxxx 1
11xxxx1x 1
11xxxxx1 1
11100000 2
11100100 3
Table 5-39. Bank 1 Register Map
Offset Type Name
00h R/W LBGD(L). Legacy Baud Generator Divisor Port (Low Byte)
01h R/W LBGD(H). Legacy Baud Generator Divisor Port (High Byte)
02h --- RSVD. Reserved
03h W
LCR
1
. Line Control
R/W
BSR
1
. Bank Select
04h-07h --- RSVD. Reserved
1. When bit 7 of this register is set to 1, bits [6:0] of BSR select the bank, as shown in Table 5-38 on page 132.
Table 5-40. Bank 2 Register Map
Offset Type Name
00h R/W BGD(L). Baud Generator Divisor Port (Low Byte)
01h R/W BGD(H). Baud Generator Divisor Port (High Byte)
02h R/W EXCR1. Extended Control1
03h R/W BSR. Bank Select
04h R/W EXCR2. Extended Control 2
05h --- RSVD. Reserved
06h RO RXFLV. RX_FIFO Level
07h RO TXFLV. TX_FIFO Level
Table 5-41. Bank 3 Register Map
Offset Type Name
00h RO MRID. Module and Revision ID
01h RO SH_LCR. Shadow of LCR
02h RO SH_FCR. Shadow of FIFO Control
03h R/W BSR. Bank Select
04h-07h --- RSVD. Reserved