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AMD Geode™ SC1200/SC1201 Processor Data Book 299
Core Logic Module - ISA Legacy Register Space
32579B
I/O Port 0D0h (R/W)
Read DMA Status Register, Channels 7:4
Note: Channels 5, 6, and 7 are not supported.
7 Channel 7 Request. Indicates if a request is pending.
0: No.
1: Yes.
6 Channel 6 Request. Indicates if a request is pending.
0: No.
1: Yes.
5 Channel 5 Request. Indicates if a request is pending.
0: No.
1: Yes.
4 Undefined.
3 Channel 7 Terminal Count. Indicates if TC was reached.
0: No.
1: Yes.
2 Channel 6 Terminal Count. Indicates if TC was reached.
0: No.
1: Yes.
1 Channel 5 Terminal Count. Indicates if TC was reached.
0: No.
1: Yes.
0 Undefined.
Write DMA Command Register, Channels 7:4
Note: Channels 5, 6, and 7 are not supported.
7 DACK Sense.
0: Active low.
1: Active high.
6 DREQ Sense.
0: Active high.
1: Active low.
5 Write Selection.
0: Late write.
1: Extended write.
4 Priority Mode.
0: Fixed.
1: Rotating.
3 Timing Mode.
0: Normal.
1: Compressed.
2 Channels 7:4.
0: Disable.
1: Enable.
1:0 Reserved. Must be set to 0.
Table 6-43. DMA Channel Control Registers (Continued)
Bit Description