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AMD Geode™ SC1200/SC1201 Processor Data Book 297
Core Logic Module - ISA Legacy Register Space
32579B
2 Channel 2 Terminal Count. Indicates if TC was reached.
0: No.
1: Yes.
1 Channel 1 Terminal Count. Indicates if TC was reached.
0: No.
1: Yes.
0 Channel 0 Terminal Count. Indicates if TC was reached.
0: No.
1: Yes.
Write DMA Command Register, Channels 3:0
7 DACK Sense.
0: Active low.
1: Active high.
6 DREQ Sense.
0: Active high.
1: Active low.
5 Write Selection.
0: Late write.
1: Extended write.
4 Priority Mode.
0: Fixed.
1: Rotating.
3 Timing Mode.
0: Normal.
1: Compressed.
2 Channels 3:0.
0: Disable.
1: Enable.
1:0 Reserved. Must be set to 0.
I/O Port 009h Software DMA Request Register, Channels 3:0 (W)
7:3 Reserved. Must be set to 0.
2 Request Type.
0: Reset.
1: Set.
1:0 Channel Number Request Select
00: Channel 0.
01: Channel 1.
10: Channel 2.
11: Channel 3.
I/O Port 00Ah DMA Channel Mask Register, Channels 3:0 (WO)
7:3 Reserved. Must be set to 0.
2 Channel Mask.
0: Not masked.
1: Masked.
1:0 Channel Number Mask Select.
00: Channel 0.
01: Channel 1.
10: Channel 2.
11: Channel 3.
Table 6-43. DMA Channel Control Registers (Continued)
Bit Description