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368 AMD Geode™ SC1200/SC1201 Processor Data Book
Electrical Specifications
32579B
9.1.5.3 Definition of System Conditions for
Measuring On Parameters
The SC1200/SC1201 processor’s current is highly depen-
dent on two functional characteristics, DCLK (DOT clock)
and SDRAM frequency. Table 9-5 shows how these factors
are controlled when measuring the typical average and
absolute maximum processor current parameters.
9.1.5.4 DC Current Measurements
Table 9-6 and Table 9-7 show the DC current measure-
ments of the SC1200/SC1201 processor. The
SC1200/SC1201 processor supports TV, CRT, and TFT
displays, but it is expected that generally only one display
interface will be used. Power consumed by the
SC1200/SC1201 processor is different with different dis-
plays. The CRT and TV DACs require current, while the
TFT interface even though it has no DAC to power, also
draws current while it is active. The CRT and TV DACs and
the TFT interface are presented as separate line items.
The chosen display type I/O current should be added to the
Typical, Absolute Maximum, and Active Idle I/O currents to
get total current.
Table 9-5. System Conditions Used to Measure SC1200/SC1201 Current During On State
CPU Current Measurement
System Conditions
V
CORE
(Note 1)
V
IO
(Note 1)
DCLK
Frequency
SDRAM
Frequency
Typical Average Nominal Nominal 50 MHz (Note 2) Nominal
Absolute Maximum Max Max 135 MHz (Note 3) Max
Note 1. See Table 9-3 on page 366 for nominal and maximum voltages.
Note 2. A DCLK frequency of 50 MHz is derived by setting the display mode to 800x600x8 bpp at 75 Hz, using a display
image of vertical stripes (4-pixel wide) alternating between black and white with power management disabled.
Note 3. A DCLK frequency of 135 MHz is derived by setting the display mode to 1280x1024x8 bpp at 75 Hz, using a display
image of vertical stripes (1-pixel wide) alternating between black and white with power management disabled.
Table 9-6. DC Characteristics for On State
Symbol Parameter (Note 1) Typ Avg Abs Max Unit Comments
I
CC3ON
f
CLK
= 266 MHz, I/O Current @ V
IO
= 3.3V
(Nominal); CPU state = On, excludes TFT
interface contribution and DACs
240 260 mA I
CC
for V
IO
I
COREON
f
CLK
= 266 MHz, Core Current @ V
CORE
=
1.8V (Nominal); CPU state = On
900 1090 mA I
CC
for V
CORE
I
SBON
SB Current @ V
SB
= 3.3V (Nominal); CPU
state = On
12mA
I
SBLON
SBL Current @ V
SBL
= 1.8V (Nominal); CPU
state = On
10 20 mA
I
CC3ONTFT
I/O current contribution if TFT display is used 30 50 mA
I
CCTV
If TV interface is used: CCTV Current @
V
CCTV
= 3.3 (Nominal); CPU state = On
120 150 mA
I
CCCRT
If CRT interface is used: CCCRT Current @
V
CCCRT
= 3.3 (Nominal); CPU state = On
60 80 mA
Note 1. f
CLK
ratings refer to internal clock frequency.