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282 AMD Geode™ SC1200/SC1201 Processor Data Book
Core Logic Module - X-Bus Expansion Interface - Function 5
32579B
Offset 08h-0Bh I/O Control Register 3 (R/W) Reset Value: 00009000h
31:16 Reserved. Write as read.
15:13 IO_USB_XCVR_VADJ (USB Voltage Adjustment Connection). These bits connect to the voltage adjustment interface on
the three USB transceivers. Default = 100.
12:8 IO_USB_XCVT_CADJ (USB Current Adjustment). These bits connect to the current adjustment interface on the three
USB transceivers. Default = 10000.
7 IO_TEST_PORT_EN (Debug Test Port Enable).
0: Disable
1: Enable
6:0 IO_TEST_PORT_REG (Debug Port Pointer). These bits are used to point to the 16-bit slice of the test port bus.
Table 6-40. F5BAR0+I/O Offset: X-Bus Expansion Registers (Continued)
Bit Description