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CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.5 ADDN (Add Word Data of Source Register to Destination
Register)
Adds the word data in "Rj" and the word data in "Ri", stores results to "Ri" without
changing flag settings.
■ ADDN (Add Word Data of Source Register to Destination Register)
Assembler format: ADDN Rj, Ri
Operation: Ri + Rj → Ri
Flag change:
N, Z, V, and C: Unchanged
Execution cycles: 1 cycle
Instruction format:
Example: ADDN R2, R3
NZVC
––––
MSB LSB
10100010 Rj Ri
R2
R3
1234 5678
8765 4321
NZVC
CCR
R2
R3
CCR
0000
NZVC
0000
9999 9999
1234 5678
Before execution After execution
Instruction bit pattern : 1010 0010 0010 0011